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Top 50 PCB Design Interview Questions and Answers with Examples

Ques1. What Is Need For A PCB ?

Ans: Designs on bread boards or per boards are cumbersome, to have neat placement of components without jumpers or wires a PCB is designed. It also helps in providing physical stability and overall circuit is more reliable.


Que2. How Do You Verify Schematic Symbols Or Footprints?

Ans: Cross verify with datasheets, print footprints and match with actual devices before production.


Que3. What Are Basic Checks While Laying Out MCU Based Design?

Ans: Power path: Ensure that the power flow tracks have sufficient trace width.

Oscillator circuit: Ensure oscillator is placed near to MCU pins. Distance depends on specific MCU. It is done so that MCU receives stable oscillations without noise.


Que4. Flow Of Complete Pcb Design?

Ans: Library creation

Board outline and mechanicals

Importing net list

Design Rule settings

Component Placement

Routing

Split plans

Silkscreen and Assembly settings

Gerber Settings


Que5. What Are The Inputs You Need To Design A Pcb? Ans: We need schematic and net list from Hardware side and Board mechanicals from client i.e, board outline, mounting holes etc. And another important thing that we need is PCB stackup it is based on complexity of the board for example if we are using fpga first we should know number of signal layers need for fpga signal breakout. Que6. How do you define design rules? Ans: Design rules are nothing but creating trace width, spacing, vias limitations. Generally we get trace width and spacing details from stackup. Que7. How do place components? Ans: Place major components first i.e. connectors, BGAs, major ICs then place other sections. Que8. How do you place connectors? Ans: First check whether right angle or straight. If it is right angle place at edge of the board and consider if there any recommendations from client. Que9. What is the use of a decoupling capacitor? Ans: A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the ICs for which it is intended as possible. Que10. The width of a trace is increased ? Will its characteristic impedance increase of decrease ? Ans: The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the trace decreases. Que11. How to choose PCB material? Ans: PCB material has to be selected totally based on the balance between design demand, volume production and cost. Que12. How to avoid high-frequency interference? Ans: Reduce crosstalk as much as possible, which can be achieved by enlarging the distance between high-speed signals and analog signals. Que13. How to arrange traces carrying differential signals? Ans: Two points should be focused in terms of traces carrying differential signals design. The spacing between two lines should maintain parallel. Que14. How to arrange traces carrying differential signals when there’s only one clock signal line at output terminal? Ans: The premise of traces carrying differential signals arrangement is that both signal sources and receiving end should be differential signals. Therefore, differential routing can never work on clock signals containing only one output end. Que15. Can matched resistance be added between differential pairs at receiving end? Ans: Matched resistance is usually added between differential pairs at receiving end and its value is equal to that of differential impedance. As a result, signal quality will be better. Que16. Why should differential pair traces be close to each other and parallel? Ans: Differential pair traces should be properly close and parallel. The distance between differential pair traces is determined by differential impedance that is a key reference parameter in terms of differential pair design. Que17. Can ground lines be added to the middle of differential signal lines? Ans: Basically, ground lines cannot be added among differential signal lines because of mutual coupling between differential signal lines, such as flux cancellation, noise immunity etc. Coupling effect will be destroyed if ground lines are added among them. Que18. What is the principle of picking up suitable PCB and cover grounding point? Ans: The principle is to take advantage of chassis ground to provide a path with low impedance to returning current and to control the path of this returning current. Que19. What is routing topology? Ans: Routing topology, also called routing order, refers to the order of routing in terms of network with multiple terminators. Que20. How should routing topology be adjusted to increase signal integrity? Ans: This type of network signals is so complex that topology is different based on different directions, different levels, different kinds of signals. Therefore, it’s difficult to judge which type of signals is beneficial to signal quality. Que21. What is return current? Ans: As high-speed digital signals are running, signals flow from drivers to carrier along PCB transmission line and then return to driver terminal through the shortest path along ground or power. The returning signals at ground or power are called return current. Que22. How many types of terminals are there? Ans: Terminals are classified into source matching and terminal matching. The former refers to series resistor matching while the latter refers to parallel matching. Que23. What elements can determine matching types? Ans: Matching type is usually determined by BUFFER characteristics, topology, level classifications and judgment type. Que24. For a circuit composed by a couple of PCB boards, should they share the same ground? Ans: A circuit composed by a couple of PCB boards should normally share the same ground because it’s impractical to apply a couple of powers in a single circuit. Using different powers help reduce interference. Que 25. What Is Need For A PCB?

Ans: Designs on bread boards or per boards are cumbersome, to have neat placement of components without jumpers or wires a PCB is designed. It also helps in providing physical stability and overall circuit is more reliable.


Que 26. How Do You Verify Schematic Symbols Ans: Footprints? Ans: Cross verify with datasheets, print footprints and match with actual devices before production. Que 27. What Are Basic Checks While Laying Out MCU Based Design? Ans: Power path: Ensure that the power flow tracks have sufficient trace width. Oscillator circuit: Ensure oscillator is placed near to MCU pins. Distance depends on specific MCU. It is done so that MCU receives stable oscillations without noise. Que 28. What Are Basic Checks For Rf Design?(or) What Are Units For Measuring Footprints? Ans: Millimetre: SMD components. Mils: Through hole. Que 29. What Is Mil? Ans: 1 mil is 1/1000 inch. Que 30. Why Is It Used? Ans: The dimensions of most of the through hole components are in mils. e.g. pitch between IC pins(100 mils), Width of ICs (300 mil, 600 mil) etc. Hence if measurement of these in mm will not round figures. Que 31. Flow Of Complete PCB Design? Ans: Library creation Board outline and mechanicals Importing net list Design Rule settings Component Placement Routing Split plans Silkscreen and Assembly settings Gerber Settings Que 32. What Are The Inputs You Need To Design A PCB? Ans: We need schematic, bom and net list(some pcb engineer generates net list) from Hardware side and Board mechanicals from client i.e, board outline, mounting holes etc. And another important thing that we need is PCB stackup it is based on complexity of the board for example if we are using fpga first we should know number of signal layers need for fpga signal breakout. Que 33. How To Create Footprint? Ans: Footprint flow: Pad stack creation pin placement Assembly outline Silkscreen outline Place bound top (we can mention height of the part here) Dfa bound top No probe top Silk and assembly reference designator These are the basic things we need to create a footprint, follow IPC standards for proper guidelines. Que 34. What Is Board Mechanicals? Ans: Draw board outline by considering client requirements, place mechanical holes and global fiducials. Create route Keep in and place keep in areas, That can be raised from this Size of the mechanical holes that you have used in your design and clearances that you have given to these. What are fiducial and use of these fiducial and types and differences between them. Fiducial placement and clearances. What are the clearances you have given from board outline to route and place Keep in. Que 35. What Are The Errors You Got While Importing Net List ? Ans: PCB footprint not found. Pins mismatch between symbol and footprint etc. Que 36. How Do Place Components? Ans: Place major components first i.e. connectors, BGAs, major ICs then place other sections. Que 37. How Do You Place Connectors? Ans: First check whether i.e right angle or straight. If it is right angle place at edge of the board and consider if there any recommendations from client. Que 38. How Do You Plan Routing And What Are The Parameters You Consider While Routing ? Ans: Placement routing plays major roles in pcb design, quality of the board depends on placement and routing, good placement and routing can reduce your board fabrication cost also. Place components by considering routing strategy and follow schematic flow once your placement is done do fanout for all the components, route high speed interfaces and complex areas first and maintain ground reference plane for all high speed signals and make sure that every trace has reference plane and try to reduce vias on signals vias can change trace characteristic impedance. Que 39. A large thermal pad is divided into four sections? What is the use of it? Ans: The open area between the 4 sections lead to escape of the gases during the reflow and soldering process. It leads to better manufacturability. Que 40. The width of a trace is increased ? Will its characteristic impedance increase of decrease ? Ans: The Capacitance per unit length of the trace increases and therefore, the characteristic impedance of the trace decreases. Que 41. what are the most significant problems that you are seeing in PCB designs these days? Ans: It's dependent on the design - whether it's high speed/low speed, high edge rate/lower edge rate, a simple PCB or large backplane design. However, some of the glaring problems are transmission line reflection due to the capacitive load; ground bounce; crosstalk between violent aggressors (like CMOS) and sensitive victims (like ECL/PECL and analog); bypassing and power delivery; common mode differential pair problems; and high speed clock loading. Que 42. How fast are the fastest boards you are seeing? How complex in terms of components and pins? Ans: Several students in my classes are designing backplanes, servers and blades that have clock frequencies up to 11GHz. I consulted for a company that built a backplane with 65 BGAs having over 600 balls each, 34 layers and over 58K solder joints. The fastest digital board (not microwave) was an aerospace design running at 43 GHz. Regarding components, there is a BGA graphics processor with a clock speed of 5.6 GHz that has over 3400 balls. Que 43. What design techniques are needed to keep signal integrity under control? Ans: Excellent communication between the EE design engineer, the PCB design engineer, the test engineer and manufacturing engineer is critical. Also, close coordination with the bareboard vendor and the EMS supplier is essential. The inputs from all of these will influence the best design techniques for achieving signal integrity. It is very important to conduct digital simulation (as with Cadence Allegro SI) and EMI/EMC simulation. The more up front the potential problem identification, the less debug time, the fewer problems during compliance testing, and the quicker the time to market. Que 44. What crosstalk problems are you seeing in high-speed designs? Ans: High density board layout is very challenging. We have seen designs where 2s and 2s [2 mil-in wide land traces and spacing] are being used due to density/packaging restrictions. Interference between CMOS/TTL high edge rates and ECL/PECL is another problem. Yet another major concern is sensitive analog circuits in close proximity to the fast edge rate digital signals. This is where guard traces around the analog traces become effective. Que 45. How does crosstalk impact layer stacking? Ans: To control crosstalk there has to be a distance between the aggressor and the victim versus the distance to the reference ground plane or power plane. Therefore, the tradeoff in many cases is how do I minimize my stackup layers (which is a cost consideration) versus controlling the crosstalk, and also the characteristic impedance, which is also a correlation between trace width and distance to the reference plane (or planes as in striplines). Que 46. How do you calculate the TRACE IMPEDANCE of a PCB trace? Ans: There are many methods. A formula method gives a quick result, though it is not highly accurate. A 2D Field solver gives more accurate result. The Trace impedance depends upon the width of the trace, separation from the ground / power plane, and the relative permittivity of the material Que 47. What is the difference between a blind and buried via? Ans: blind vias are use to connect an inner layer to either the top or bottom layer. A buried via is used for connecting two inner layers. It does not go either to the top or the bottom layer. A regular via ( different from the blind and the buried via connects the top and the bottom layer and also passes through the inner layers. Que 48. What is the use of a decoupling capacitor? Ans: A decoupling capacitor is used to smoothen the power supply noise. It should be placed as close to the ICs for which it is intended as possible. Que 49. What is DRC ? what kind of drc errors you find in PCB design ? Ans: DRC stands for Design Rule checking. A PCB should not have any electrical failure before we tape out for the manufacturing. Common DRC errors include, trace to pad violation, pad to pad violation, component keep out violation. Additionally a PCB Design may have high speed design rule related constraints. This may include, length matching constraints, differential signal length matching constraint. Que 50. What are the things you should do you ensure design for compliance for EMI ? Ans: We should use common mode chokes for all cables connectors. The common mode chokes should be placed as close to the connector as possible. The Power and ground planes should be as close to each other as possible. The High speed signal should refer to a ground or power plane and should not cross a split plane. Stitching capacitor should be used in case split plane is used. Que 51. A large thermal pad is divided into four sections ? what is the use of it ? Ans: The open area between the 4 sections lead to escape of the gases during the reflow and soldering process. It leads to better manufacturability. Que 52. How to choose PCB (Printed Circuit Board) material? Ans: PCB material has to be selected totally based on the balance between design demand, volume production and cost. Design demand involves electrical elements that should be taken into serious consideration during high-speed PCB design. In addition, dielectric constant and dielectric loss should be considered whether they go with the frequency. Que 53. How to avoid high-frequency interference? Ans: The leading principle to overcome high-frequency interference is to reduce crosstalk as much as possible, which can be achieved by enlarging the distance between high-speed signals and analog signals or equipping ground guard or shunt traces beside analog signals. In addition, the noise interference caused by digital ground on analog ground should be carefully considered Que 54. How to resolve the conflicts between manual routing and auto-routing on high-speed signals? Ans: Now most automatic routers are able to control wire running method and number of through holes by setting constraint conditions. All EDA companies differ a lot from each other in terms of wire running methods and constraint condition setting. The difficulty of automatic routing is closely related with wire running capability. Therefore, this problem can be resolved by picking up a router with high capability of wire running.


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